The need often arises in integrated circuits (ICs) to electrically isolate various regions from one another. At the digital device level a number of techniques are already in use, including LOCOS (local oxidation of silicon) and STI (shallow trench isolation). These techniques insure good electrical isolation of various regions from one another but they are time consuming to implement and consume significant real estate on the wafer surface. A particular limitation of these techniques is that they are useful only for regions that are relatively close to the wafer surface.
There are, however, a number of situations where the isolating region needs to extend to a significant depth below the surface including, in some cases, all the way through to the other surface of the wafer. Examples include reduction of substrate noise coupling, realization of high Q inductors on silicon mixed mode ICs, reduction of transmission line loss for high frequency ICs, and the separation of different types of devices such as analog from digital or bipolar from CMOS.
In FIGS. 1 and 2 we show two examples of devices in which isolating regions that extend all the way through an integrated circuit wafer would be advantageous but which are difficult to implement using current state of the art techniques. In FIG. 1 single crystal semiconductor wafer 1 (typically silicon but possibly other semiconductors such as germanium, gallium arsenide, silicon/germanium, indium phosphide, gallium nitride, and silicon carbide) contains both an MOS circuit 2 as well as micro-strip 3 and high Q inductor 4. Metal ground layer 6 covers the entire underside of the wafer. In order to fully decouple the inductor and the microstrip from the integrated circuit, an isolating region such as 5 has to be provided.
FIG. 2 shows semiconductor wafer 1 on whose surface are three different types of circuit. For example, circuit 22 could be an MOS circuit, circuit 23 could be a bipolar circuit, and circuit 24 could be an analog circuit. As in the previous example, it is necessary to decouple these different circuits from one another. This can be achieved if isolating regions such as 25 can be provided. Such regions will need to extend all the way through the wafer, as shown.
The existing art does not offer any teachings relating to low cost effective methods for forming regions such as 5 in FIG. 1 or 25 in FIG. 2. The available technology appears to have focussed on the inverse problem of how to form a low resistivity region within an insulating or high resistivity wafer:
Nicollian et al. (U.S. Pat. No. 5,051,786 September 1991) show how quantum wells can be formed from polycrystalline material by suitable passivation of the grain boundaries. Mei et al. (U.S. Pat. No. 5,366,926 November 1994) show how amorphous silicon may be hydrogenated by the application of a laser beam. Kudo (U.S. Pat. No. 5,496,768 March 1996) also uses laser beams to manufacture polysilicon thin films while Masao et al. (U.S. Pat. No. 4,609,407 September 1986) disclose a method of making three dimensional semiconductor devices in regions that have been selectively regrown. Ion projection systems are discussed by Buchmann et al. in Micro Electro Mechanical Systems '92 Travemunde (Germany) February 1992 pp. 67-71.